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28nm High-K Metal Gate RF CMOS TCAD Calibration


Metadata FieldValueLanguage
dc.contributor.advisorNiu, Guofuen_US
dc.contributor.authorZhang, Jiabien_US
dc.date.accessioned2015-12-10T16:59:16Z
dc.date.available2015-12-10T16:59:16Z
dc.date.issued2015-12-10
dc.identifier.urihttp://hdl.handle.net/10415/4936
dc.description.abstractStates of art of 28nm MOSFET structure is studied using the calibrated simulation deck, RF noise is simulated and compared with measurements. DC characteristics is firstly calibrated by adjusting doping profiles and other physical models include mobility and energy relaxation time model parameters. For DC calibration, body effect is focused on. DIBL(Drain Induced Barrier Lowering)and SS(Subthreshold slope) are fitted by fitting simulation IDS-VGS curves and IDS-VDS curves to measurement data.en_US
dc.rightsEMBARGO_GLOBALen_US
dc.subjectElectrical Engineeringen_US
dc.title28nm High-K Metal Gate RF CMOS TCAD Calibrationen_US
dc.typeMaster's Thesisen_US
dc.embargo.lengthMONTHS_WITHHELD:51en_US
dc.embargo.statusEMBARGOEDen_US
dc.embargo.enddate2020-03-04en_US
dc.contributor.committeeDai, Faen_US

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